From 7939b4826506bde98d299e1ba7a38e17cd1fa785 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:02 -0500
Subject: ARM: Implement disassembly for the new data processing classes.

---
 src/arch/arm/insts/pred_inst.hh | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'src/arch/arm/insts/pred_inst.hh')

diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh
index 3231894b0..39d479d4f 100644
--- a/src/arch/arm/insts/pred_inst.hh
+++ b/src/arch/arm/insts/pred_inst.hh
@@ -193,6 +193,8 @@ class DataImmOp : public PredOp
         PredOp(mnem, _machInst, __opClass),
         dest(_dest), op1(_op1), imm(_imm), rotC(_rotC)
     {}
+
+    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
 class DataRegOp : public PredOp
@@ -209,6 +211,8 @@ class DataRegOp : public PredOp
         dest(_dest), op1(_op1), op2(_op2),
         shiftAmt(_shiftAmt), shiftType(_shiftType)
     {}
+
+    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
 class DataRegRegOp : public PredOp
@@ -224,6 +228,8 @@ class DataRegRegOp : public PredOp
         dest(_dest), op1(_op1), op2(_op2), shift(_shift),
         shiftType(_shiftType)
     {}
+
+    std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
 };
 
 /**
-- 
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