From c02f9cdddf157b91ca3a338bbe8b2a2b68d4ee93 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:02 -0500 Subject: ARM: Add new base classes for data processing instructions. --- src/arch/arm/insts/pred_inst.hh | 47 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) (limited to 'src/arch/arm/insts/pred_inst.hh') diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh index 817ed44f5..220cf6a0f 100644 --- a/src/arch/arm/insts/pred_inst.hh +++ b/src/arch/arm/insts/pred_inst.hh @@ -155,6 +155,53 @@ class PredIntOp : public PredOp std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; +class DataImmOp : public PredOp +{ + protected: + IntRegIndex dest, op1; + uint32_t imm; + // Whether the carry flag should be modified if that's an option for + // this instruction. + bool rotC; + + DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) : + PredOp(mnem, _machInst, __opClass), + dest(_dest), op1(_op1), imm(_imm), rotC(_rotC) + {} +}; + +class DataRegOp : public PredOp +{ + protected: + IntRegIndex dest, op1, op2; + int32_t shiftAmt; + ArmShiftType shiftType; + + DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, + int32_t _shiftAmt, ArmShiftType _shiftType) : + PredOp(mnem, _machInst, __opClass), + dest(_dest), op1(_op1), op2(_op2), + shiftAmt(_shiftAmt), shiftType(_shiftType) + {} +}; + +class DataRegRegOp : public PredOp +{ + protected: + IntRegIndex dest, op1, op2, shift; + ArmShiftType shiftType; + + DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, + IntRegIndex _shift, ArmShiftType _shiftType) : + PredOp(mnem, _machInst, __opClass), + dest(_dest), op1(_op1), op2(_op2), shift(_shift), + shiftType(_shiftType) + {} +}; + /** * Base class for predicated macro-operations. */ -- cgit v1.2.3