From 660fbd543f7c84dec81cd17bdb4ff08f954aec77 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Thu, 2 Jun 2016 13:41:26 +0100 Subject: arm: Rewrite ERET to behave according to the ARMv8 ARM The ERET instruction doesn't set PSTATE correctly in some cases (particularly when returning to aarch32 code). Among other things, this breaks EL0 thumb code when using a 64-bit kernel. This changeset updates the ERET implementation to match the ARM ARM. Change-Id: I408e7c69a23cce437859313dfe84e68744b07c98 Signed-off-by: Andreas Sandberg Reviewed-by: Nathanael Premillieu --- src/arch/arm/insts/static_inst.hh | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'src/arch/arm/insts/static_inst.hh') diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh index 9ca64d1fe..55d16f69d 100644 --- a/src/arch/arm/insts/static_inst.hh +++ b/src/arch/arm/insts/static_inst.hh @@ -404,6 +404,15 @@ class ArmStaticInst : public StaticInst NSACR nsacr, FPEXC fpexc, bool fpexc_check, bool advsimd) const; + /** + * Get the new PSTATE from a SPSR register in preparation for an + * exception return. + * + * See shared/functions/system/SetPSTATEFromPSR in the ARM ARM + * psueodcode library. + */ + CPSR getPSTATEFromPSR(ThreadContext *tc, CPSR cpsr, CPSR spsr) const; + public: virtual void annotateFault(ArmFault *fault) {} -- cgit v1.2.3