From 0c0ccad52595e837301eebcf8597862d9abb4f9c Mon Sep 17 00:00:00 2001 From: Nikos Nikoleris Date: Thu, 12 Jan 2017 17:59:44 +0000 Subject: arm: Add support for the dc {civac, cvac, cvau, ivac} instr This patch adds support for decoding and executing the following ARMv8 cache maintenance instructions by Virtual Address: * dc civac: Clean and Invalidate by Virtual Address to the Point of Coherency * dc cvac: Clean by Virtual Address to the Point of Coherency * dc cvau: Clean by Virtual Address to the Point of Unification * dc ivac: Invalidate by Virtual Addrsess to the Point of Coherency Change-Id: I58cabda37f9636105fda1b1e84a0a04965fb5670 Reviewed-by: Sudhanshu Jha Reviewed-by: Stephan Diestelhorst Reviewed-on: https://gem5-review.googlesource.com/5060 Maintainer: Andreas Sandberg Reviewed-by: Andreas Sandberg --- src/arch/arm/insts/mem64.hh | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/arch/arm/insts') diff --git a/src/arch/arm/insts/mem64.hh b/src/arch/arm/insts/mem64.hh index 933d34576..7ad2f52eb 100644 --- a/src/arch/arm/insts/mem64.hh +++ b/src/arch/arm/insts/mem64.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011-2013 ARM Limited + * Copyright (c) 2011-2013,2017 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -52,9 +52,9 @@ class SysDC64 : public ArmStaticInst uint64_t imm; SysDC64(const char *mnem, ExtMachInst _machInst, OpClass __opClass, - IntRegIndex _base, IntRegIndex _dest, uint64_t _imm) - : ArmStaticInst(mnem, _machInst, __opClass), base(_base), dest(_dest), - imm(_imm) + IntRegIndex _base, MiscRegIndex miscReg, uint64_t _imm) + : ArmStaticInst(mnem, _machInst, __opClass), base(_base), + dest((IntRegIndex)miscReg), imm(_imm) {} std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; -- cgit v1.2.3