From e9c8f68c0fcfb72934b852a61671fb94a1927e1d Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:16 -0500 Subject: ARM: Make undefined instructions obey predication. --- src/arch/arm/insts/misc.cc | 8 ++++++++ src/arch/arm/insts/misc.hh | 11 +++++++++++ 2 files changed, 19 insertions(+) (limited to 'src/arch/arm/insts') diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index 0eae37de0..a0af4fc2f 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -261,3 +261,11 @@ RegImmRegShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const printReg(ss, op1); return ss.str(); } + +std::string +UnknownOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + return csprintf("%-10s (inst 0x%x, opcode 0x%x, binary:%s)", + "unknown", machInst, machInst.opcode, + inst2string(machInst)); +} diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh index 6d78b311a..c9e114f85 100644 --- a/src/arch/arm/insts/misc.hh +++ b/src/arch/arm/insts/misc.hh @@ -258,4 +258,15 @@ class RegImmRegShiftOp : public PredOp std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; +class UnknownOp : public PredOp +{ + protected: + + UnknownOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : + PredOp(mnem, _machInst, __opClass) + {} + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; +}; + #endif -- cgit v1.2.3