From e658b6fed46afb0b587dba037bd4558e82c05b0d Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:09 -0500
Subject: ARM: Add support for the clidr register.

This register will always report 0 caches as implemented. It's not clear how
to find out how many there really are when dealing with an arbitrary
hierarchy.
---
 src/arch/arm/isa.hh | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src/arch/arm/isa.hh')

diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index dd80976bb..1d8f14cab 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -164,6 +164,11 @@ namespace ArmISA
                 panic("Unimplemented CP15 register %s read.\n",
                       miscRegName[misc_reg]);
             }
+            switch (misc_reg) {
+              case MISCREG_CLIDR:
+                warn("The clidr register always reports 0 caches.\n");
+                break;
+            }
             return readMiscRegNoEffect(misc_reg);
         }
 
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