From cbdebf852efd56651a18532c6ffbe7ac580aa539 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:05 -0500
Subject: ARM: Implement SVC (was SWI) outside of the decoder.

---
 src/arch/arm/isa/decoder/arm.isa | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

(limited to 'src/arch/arm/isa/decoder')

diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa
index fe7e67b11..58b9f6699 100644
--- a/src/arch/arm/isa/decoder/arm.isa
+++ b/src/arch/arm/isa/decoder/arm.isa
@@ -286,13 +286,7 @@ format DataOp {
             } // CPNUM  (OP4 == 1)
         } //OPCODE_4
 
-        1: PredOp::swi({{
-#if FULL_SYSTEM
-            fault = new SupervisorCall();
-#else
-            fault = new SupervisorCall(machInst);
-#endif
-        }}, IsSyscall);
+        1: Svc::svc();
     } // OPCODE_24
 
 }
-- 
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