From ce9cb1ecb5844aa589ebfef348d8731c3228acad Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 1 Jul 2009 22:15:39 -0700
Subject: ARM: Centralize the declaration of resTemp.

---
 src/arch/arm/isa/formats/pred.isa | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/arch/arm/isa/formats/pred.isa')

diff --git a/src/arch/arm/isa/formats/pred.isa b/src/arch/arm/isa/formats/pred.isa
index 51d383d6a..ef53843ae 100644
--- a/src/arch/arm/isa/formats/pred.isa
+++ b/src/arch/arm/isa/formats/pred.isa
@@ -41,6 +41,8 @@ def template PredOpExecute {{
     Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
     {
         Fault fault = NoFault;
+        uint64_t resTemp = 0;
+        resTemp = resTemp;
         %(op_decl)s;
         %(op_rd)s;
 
@@ -100,7 +102,6 @@ let {{
 }};
 
 def format DataOp(code, icValue, ivValue) {{
-    code += "resTemp = resTemp;"
     regCode = re.sub(r'op2', 'shift_rm_rs(Rm, Rs, \
                               shift, Cpsr<29:0>)', code)
     immCode = re.sub(r'op2', 'shift_rm_imm(Rm, shift_size, \
-- 
cgit v1.2.3