From 1f032ad3452c2514287c142fb3faf953a5682ea3 Mon Sep 17 00:00:00 2001
From: Gene Wu <Gene.Wu@arm.com>
Date: Mon, 23 Aug 2010 11:18:41 -0500
Subject: ARM: Implement CLREX

---
 src/arch/arm/isa/formats/branch.isa | 2 +-
 src/arch/arm/isa/formats/uncond.isa | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/arch/arm/isa/formats')

diff --git a/src/arch/arm/isa/formats/branch.isa b/src/arch/arm/isa/formats/branch.isa
index f203d5257..44a2f5251 100644
--- a/src/arch/arm/isa/formats/branch.isa
+++ b/src/arch/arm/isa/formats/branch.isa
@@ -194,7 +194,7 @@ def format Thumb32BranchesAndMiscCtrl() {{
                           case 0x1:
                             return new Enterx(machInst);
                           case 0x2:
-                            return new WarnUnimplemented("clrex", machInst);
+                            return new Clrex(machInst);
                           case 0x4:
                             return new WarnUnimplemented("dsb", machInst);
                           case 0x5:
diff --git a/src/arch/arm/isa/formats/uncond.isa b/src/arch/arm/isa/formats/uncond.isa
index 079b472f3..92e4db22d 100644
--- a/src/arch/arm/isa/formats/uncond.isa
+++ b/src/arch/arm/isa/formats/uncond.isa
@@ -97,7 +97,7 @@ def format ArmUnconditional() {{
                 } else if (op1 == 0x57) {
                     switch (op2) {
                       case 0x1:
-                        return new WarnUnimplemented("clrex", machInst);
+                        return new Clrex(machInst);
                       case 0x4:
                         return new WarnUnimplemented("dsb", machInst);
                       case 0x5:
-- 
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