From 35f0c01fea89517530d11853eed513b4f2d5b497 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:08 -0500
Subject: ARM: Decode the unimplemented cp15 instruction barrier.

---
 src/arch/arm/isa/formats/misc.isa | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/arch/arm/isa/formats')

diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa
index 74e10a2d8..ace90786f 100644
--- a/src/arch/arm/isa/formats/misc.isa
+++ b/src/arch/arm/isa/formats/misc.isa
@@ -101,6 +101,9 @@ def format McrMrc15() {{
           case MISCREG_DCCIMVAC:
             return new WarnUnimplemented(
                     isRead ? "mrc dccimvac" : "mcr dcimvac", machInst);
+          case MISCREG_CP15ISB:
+            return new WarnUnimplemented(
+                    isRead ? "mrc cp15isb" : "mcr cp15isb", machInst);
           default:
             if (isRead) {
                 return new Mrc15(machInst, rt, (IntRegIndex)miscReg);
-- 
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