From 63464d950ec4e8b8f3aa86802ca9fbf1e8c662b6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 25 Aug 2010 19:10:42 -0500 Subject: ARM: Seperate out the renamable bits in the FPSCR. --- src/arch/arm/isa/formats/fp.isa | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'src/arch/arm/isa/formats') diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 1482c2119..9d40a4a43 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -1969,7 +1969,11 @@ let {{ default: return new Unknown(machInst); } - return new Vmsr(machInst, (IntRegIndex)specReg, rt); + if (specReg == MISCREG_FPSCR) { + return new VmsrFpscr(machInst, (IntRegIndex)specReg, rt); + } else { + return new Vmsr(machInst, (IntRegIndex)specReg, rt); + } } } else if (l == 0 && c == 1) { if (bits(a, 2) == 0) { @@ -2061,8 +2065,15 @@ let {{ cpsrMask.z = 1; cpsrMask.c = 1; cpsrMask.v = 1; - return new VmrsApsr(machInst, INTREG_CONDCODES, - (IntRegIndex)specReg, (uint32_t)cpsrMask); + if (specReg == MISCREG_FPSCR) { + return new VmrsApsrFpscr(machInst, INTREG_CONDCODES, + (IntRegIndex)specReg, (uint32_t)cpsrMask); + } else { + return new VmrsApsr(machInst, INTREG_CONDCODES, + (IntRegIndex)specReg, (uint32_t)cpsrMask); + } + } else if (specReg == MISCREG_FPSCR) { + return new VmrsFpscr(machInst, rt, (IntRegIndex)specReg); } else { return new Vmrs(machInst, rt, (IntRegIndex)specReg); } -- cgit v1.2.3