From 7391ea6de63578722d97c9169e60db5b06754137 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Wed, 23 Feb 2011 15:10:49 -0600
Subject: ARM: Do something for ISB, DSB, DMB

---
 src/arch/arm/isa/formats/misc.isa | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

(limited to 'src/arch/arm/isa/formats')

diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa
index 3bcb5c97d..4a9200504 100644
--- a/src/arch/arm/isa/formats/misc.isa
+++ b/src/arch/arm/isa/formats/misc.isa
@@ -120,14 +120,11 @@ let {{
             return new WarnUnimplemented(
                     isRead ? "mrc dccmvau" : "mcr dccmvau", machInst);
           case MISCREG_CP15ISB:
-            return new WarnUnimplemented(
-                    isRead ? "mrc cp15isb" : "mcr cp15isb", machInst);
+            return new Isb(machInst);
           case MISCREG_CP15DSB:
-            return new WarnUnimplemented(
-                    isRead ? "mrc cp15dsb" : "mcr cp15dsb", machInst);
+            return new Dsb(machInst);
           case MISCREG_CP15DMB:
-            return new WarnUnimplemented(
-                    isRead ? "mrc cp15dmb" : "mcr cp15dmb", machInst);
+            return new Dmb(machInst);
           case MISCREG_ICIALLUIS:
             return new WarnUnimplemented(
                     isRead ? "mrc icialluis" : "mcr icialluis", machInst);
-- 
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