From e727a0eeaa5f2d46921c8496d77623a9704d40b6 Mon Sep 17 00:00:00 2001 From: Dylan Johnson Date: Tue, 2 Aug 2016 10:38:01 +0100 Subject: arm: change instruction classes to catch hyp traps Change-Id: I122918d0e3dfd01ae1a4ca4f19240a069115c8b7 --- src/arch/arm/isa/formats/misc.isa | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'src/arch/arm/isa/formats') diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index f81b96f2f..43a7cc975 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010-2013 ARM Limited +// Copyright (c) 2010-2013,2016 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -181,15 +181,16 @@ let {{ switch (miscReg) { case MISCREG_NOP: - return new NopInst(machInst); + return new McrMrcMiscInst(isRead ? "mrc nop" : "mcr nop", + machInst, iss, MISCREG_NOP); case MISCREG_CP15_UNIMPL: return new FailUnimplemented(isRead ? "mrc unkown" : "mcr unkown", machInst, csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown", crn, opc1, crm, opc2, isRead ? "read" : "write")); case MISCREG_DCCMVAC: - return new FlushPipeInst( - isRead ? "mrc dccmvac" : "mcr dccmvac", machInst); + return new McrMrcMiscInst(isRead ? "mrc dccmvac" : "mcr dccmvac", + machInst, iss, MISCREG_DCCMVAC); case MISCREG_CP15ISB: return new Isb(machInst, iss); case MISCREG_CP15DSB: -- cgit v1.2.3