From 05bd3eb4ec3d9fea3dbc46112a47459085d3011c Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:16 -0500
Subject: ARM: Implement support for the IT instruction and the ITSTATE bits of
 CPSR.

---
 src/arch/arm/isa/insts/macromem.isa | 4 ----
 1 file changed, 4 deletions(-)

(limited to 'src/arch/arm/isa/insts/macromem.isa')

diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index 82e9d9842..2b42dfac8 100644
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -46,10 +46,6 @@
 // Load/store microops
 //
 
-let {{
-    predicateTest = 'testPredicate(CondCodes, condCode)'
-}};
-
 let {{
     microLdrUopCode = "IWRa = cSwap(Mem.uw, ((CPSR)Cpsr).e);"
     microLdrUopIop = InstObjParams('ldr_uop', 'MicroLdrUop',
-- 
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