From 1f032ad3452c2514287c142fb3faf953a5682ea3 Mon Sep 17 00:00:00 2001
From: Gene Wu <Gene.Wu@arm.com>
Date: Mon, 23 Aug 2010 11:18:41 -0500
Subject: ARM: Implement CLREX

---
 src/arch/arm/isa/insts/misc.isa | 11 +++++++++++
 1 file changed, 11 insertions(+)

(limited to 'src/arch/arm/isa/insts/misc.isa')

diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 341f3d1ce..09364cd23 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -668,6 +668,17 @@ let {{
     decoder_output += ImmOpConstructor.subst(setendIop)
     exec_output += PredOpExecute.subst(setendIop)
 
+    clrexCode = '''
+        unsigned memAccessFlags = ArmISA::TLB::Clrex|3|Request::LLSC;
+        fault = xc->read(0, (uint32_t&)Mem, memAccessFlags);
+    '''
+    clrexIop = InstObjParams("clrex", "Clrex","PredOp",
+                             { "code": clrexCode,
+                               "predicate_test": predicateTest },[])
+    header_output += BasicDeclare.subst(clrexIop)
+    decoder_output += BasicConstructor.subst(clrexIop)
+    exec_output += PredOpExecute.subst(clrexIop)
+
     cpsCode = '''
     uint32_t mode = bits(imm, 4, 0);
     uint32_t f = bits(imm, 5);
-- 
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