From 99fafb72b87f3b63f205bee7b20b8c19724d6305 Mon Sep 17 00:00:00 2001
From: Ali Saidi <ali.saidi@arm.com>
Date: Wed, 25 Aug 2010 19:10:42 -0500
Subject: ARM: Fix VFP enabled checks for mem instructions

---
 src/arch/arm/isa/insts/neon.isa | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

(limited to 'src/arch/arm/isa/insts/neon.isa')

diff --git a/src/arch/arm/isa/insts/neon.isa b/src/arch/arm/isa/insts/neon.isa
index 790c9c3a1..0a3285490 100644
--- a/src/arch/arm/isa/insts/neon.isa
+++ b/src/arch/arm/isa/insts/neon.isa
@@ -619,13 +619,6 @@ output exec {{
     }
 }};
 
-let {{
-    simdEnabledCheckCode = '''
-        if (!neonEnabled(Cpacr, Cpsr, Fpexc))
-            return disabledFault();
-    '''
-}};
-
 let {{
 
     header_output = ""
@@ -3235,7 +3228,7 @@ let {{
         RegVect srcReg1, srcReg2, destReg;
         '''
         for reg in range(rCount):
-            eWalkCode += '''
+            eWalkCode += simdEnabledCheckCode + '''
                 srcReg1.regs[%(reg)d] = htog(FpOp1P%(reg)d.uw);
                 srcReg2.regs[%(reg)d] = htog(FpOp2P%(reg)d.uw);
             ''' % { "reg" : reg }
-- 
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