From af39ab297f7c666e77d29e836a4ff4c2a6d672a9 Mon Sep 17 00:00:00 2001
From: Curtis Dunham <Curtis.Dunham@arm.com>
Date: Fri, 9 May 2014 18:58:47 -0400
Subject: arm: add preliminary ISA splits for ARM arch

---
 src/arch/arm/isa/insts/neon64.isa | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src/arch/arm/isa/insts/neon64.isa')

diff --git a/src/arch/arm/isa/insts/neon64.isa b/src/arch/arm/isa/insts/neon64.isa
index e065761f4..bbe57bdfa 100644
--- a/src/arch/arm/isa/insts/neon64.isa
+++ b/src/arch/arm/isa/insts/neon64.isa
@@ -1959,6 +1959,9 @@ let {{
                       2, minAcrossCode)
     twoRegAcrossInstX("sminv", "SminvQX", "SimdCmpOp", smallSignedTypes, 4,
                       minAcrossCode)
+
+    split('exec')
+
     # SMLAL, SMLAL2 (by element)
     mlalCode = "destElem += (BigElement)srcElem1 * (BigElement)srcElem2;"
     threeRegLongInstX("smlal", "SmlalElemX", "SimdMultAccOp",
-- 
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