From 481eb6ae8018d0478c23fda7c5f9f3fa4db8de89 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Fri, 14 Nov 2014 03:53:51 -0500 Subject: arm: Fixes based on UBSan and static analysis Another churn to clean up undefined behaviour, mostly ARM, but some parts also touching the generic part of the code base. Most of the fixes are simply ensuring that proper intialisation. One of the more subtle changes is the return type of the sign-extension, which is changed to uint64_t. This is to avoid shifting negative values (undefined behaviour) in the ISA code. --- src/arch/arm/isa/insts/neon64_mem.isa | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'src/arch/arm/isa/insts/neon64_mem.isa') diff --git a/src/arch/arm/isa/insts/neon64_mem.isa b/src/arch/arm/isa/insts/neon64_mem.isa index af31d959e..4d3241226 100644 --- a/src/arch/arm/isa/insts/neon64_mem.isa +++ b/src/arch/arm/isa/insts/neon64_mem.isa @@ -185,7 +185,8 @@ let {{ if name == 'deint_neon_uop': eCode = ''' - VReg input[4]; // input data from scratch area + // input data from scratch area + VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} }; VReg output[2]; // output data to arch. SIMD regs VReg temp; temp.lo = 0; @@ -270,7 +271,8 @@ let {{ elif name == 'int_neon_uop': eCode = ''' - VReg input[4]; // input data from arch. SIMD regs + // input data from arch. SIMD regs + VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} }; VReg output[2]; // output data to scratch area ''' @@ -332,7 +334,8 @@ let {{ elif name == 'unpack_neon_uop': eCode = ''' - VReg input[4]; //input data from scratch area + //input data from scratch area + VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} }; VReg output[2]; //output data to arch. SIMD regs ''' @@ -398,7 +401,8 @@ let {{ elif name == 'pack_neon_uop': eCode = ''' - VReg input[4]; // input data from arch. SIMD regs + // input data from arch. SIMD regs + VReg input[4] = { {0, 0}, {0, 0}, {0, 0}, {0, 0} }; VReg output[2]; // output data to scratch area ''' -- cgit v1.2.3