From 23ba9c7b965ebf2a54a8d399809eb400fc6fe6db Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:15 -0500 Subject: ARM: Fix vcvtr so that it uses the rounding mode in the FPSCR. --- src/arch/arm/isa/insts/fp.isa | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/arch/arm/isa/insts') diff --git a/src/arch/arm/isa/insts/fp.isa b/src/arch/arm/isa/insts/fp.isa index 33a85b04e..045f516ce 100644 --- a/src/arch/arm/isa/insts/fp.isa +++ b/src/arch/arm/isa/insts/fp.isa @@ -933,7 +933,7 @@ let {{ vfpFlushToZero(Fpscr, FpOp1); VfpSavedState state = prepVfpFpscr(Fpscr); __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); - FpDest.uw = vfpFpSToFixed(FpOp1, false, false, 0); + FpDest.uw = vfpFpSToFixed(FpOp1, false, false, 0, false); __asm__ __volatile__("" :: "m" (FpDest.uw)); Fpscr = setVfpFpscr(Fpscr, state); ''' @@ -950,7 +950,7 @@ let {{ vfpFlushToZero(Fpscr, cOp1.fp); VfpSavedState state = prepVfpFpscr(Fpscr); __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); - uint64_t result = vfpFpDToFixed(cOp1.fp, false, false, 0); + uint64_t result = vfpFpDToFixed(cOp1.fp, false, false, 0, false); __asm__ __volatile__("" :: "m" (result)); Fpscr = setVfpFpscr(Fpscr, state); FpDestP0.uw = result; @@ -966,7 +966,7 @@ let {{ vfpFlushToZero(Fpscr, FpOp1); VfpSavedState state = prepVfpFpscr(Fpscr); __asm__ __volatile__("" : "=m" (FpOp1) : "m" (FpOp1)); - FpDest.sw = vfpFpSToFixed(FpOp1, true, false, 0); + FpDest.sw = vfpFpSToFixed(FpOp1, true, false, 0, false); __asm__ __volatile__("" :: "m" (FpDest.sw)); Fpscr = setVfpFpscr(Fpscr, state); ''' @@ -983,7 +983,7 @@ let {{ vfpFlushToZero(Fpscr, cOp1.fp); VfpSavedState state = prepVfpFpscr(Fpscr); __asm__ __volatile__("" : "=m" (cOp1.fp) : "m" (cOp1.fp)); - int64_t result = vfpFpDToFixed(cOp1.fp, true, false, 0); + int64_t result = vfpFpDToFixed(cOp1.fp, true, false, 0, false); __asm__ __volatile__("" :: "m" (result)); Fpscr = setVfpFpscr(Fpscr, state); FpDestP0.uw = result; -- cgit v1.2.3