From 2950a95672599a9baf9007c18faf210ff9c3e392 Mon Sep 17 00:00:00 2001 From: Dylan Johnson Date: Tue, 2 Aug 2016 10:38:02 +0100 Subject: arm: Add AArch64 hypervisor call instruction 'hvc' This patch adds the AArch64 instruction hvc which raises an exception from EL1 into EL2. The host OS uses this instruction to world switch into the guest. Change-Id: I930ee43f4f0abd4b35a68eb2a72e44e3ea6570be --- src/arch/arm/isa/insts/misc64.isa | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'src/arch/arm/isa/insts') diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa index 7e88bebbb..08902abe8 100644 --- a/src/arch/arm/isa/insts/misc64.isa +++ b/src/arch/arm/isa/insts/misc64.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2011-2013 ARM Limited +// Copyright (c) 2011-2013, 2016 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -49,6 +49,24 @@ let {{ decoder_output = BasicConstructor64.subst(svcIop) exec_output = BasicExecute.subst(svcIop) + hvcCode = ''' + SCR scr = Scr64; + + if (!ArmSystem::haveVirtualization(xc->tcBase()) || + (ArmSystem::haveSecurity(xc->tcBase()) && !scr.hce)) { + fault = disabledFault(); + } else { + fault = std::make_shared(machInst, bits(machInst, 20, 5)); + } + ''' + + hvcIop = InstObjParams("hvc", "Hvc64", "ArmStaticInst", + hvcCode, ["IsSyscall", "IsNonSpeculative", + "IsSerializeAfter"]) + header_output += BasicDeclare.subst(hvcIop) + decoder_output += BasicConstructor64.subst(hvcIop) + exec_output += BasicExecute.subst(hvcIop) + # @todo: extend to take into account Virtualization. smcCode = ''' SCR scr = Scr64; -- cgit v1.2.3