From d6736384b2bb280ec12d472cac6eb25a70b4af60 Mon Sep 17 00:00:00 2001
From: Gene Wu <Gene.Wu@arm.com>
Date: Mon, 23 Aug 2010 11:18:41 -0500
Subject: MEM: Make CLREX a first class request operation and clear locks in
 caches when it in received

---
 src/arch/arm/isa/insts/misc.isa | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/arch/arm/isa/insts')

diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 2228a0f24..33197eaec 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -669,7 +669,7 @@ let {{
     exec_output += PredOpExecute.subst(setendIop)
 
     clrexCode = '''
-        unsigned memAccessFlags = ArmISA::TLB::Clrex|3|Request::LLSC;
+        unsigned memAccessFlags = Request::CLREX|3|Request::LLSC;
         fault = xc->read(0, (uint32_t&)Mem, memAccessFlags);
     '''
     clrexIop = InstObjParams("clrex", "Clrex","PredOp",
-- 
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