From 54a919f22587c75be5e7f0b88d5ec13baba600aa Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 25 Aug 2010 19:10:42 -0500
Subject: ARM: Implement CPACR register and return Undefined Instruction when
 FP access is disabled.

---
 src/arch/arm/isa/operands.isa | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/arch/arm/isa/operands.isa')

diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index 5490a28e0..7b2b50290 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -205,6 +205,7 @@ def operands {{
     'Fpsr': ('ControlReg', 'uw', 'MISCREG_FPSR', None, 2),
     'Fpsid': ('ControlReg', 'uw', 'MISCREG_FPSID', None, 2),
     'Fpscr': ('ControlReg', 'uw', 'MISCREG_FPSCR', None, 2),
+    'Cpacr': ('ControlReg', 'uw', 'MISCREG_CPACR', (None, None, 'IsControl'), 2),
     'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', None, 2),
     'Sctlr': ('ControlReg', 'uw', 'MISCREG_SCTLR', None, 2),
     'SevMailbox': ('ControlReg', 'uw', 'MISCREG_SEV_MAILBOX', None, 2),
-- 
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