From 498f9d925e0339389a19bb63d9508e6c780ba04b Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:07 -0500
Subject: ARM: Add a base class for the sel instruction.

---
 src/arch/arm/isa/templates/misc.isa | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

(limited to 'src/arch/arm/isa/templates/misc.isa')

diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa
index 3b4c6a6f8..8e781b540 100644
--- a/src/arch/arm/isa/templates/misc.isa
+++ b/src/arch/arm/isa/templates/misc.isa
@@ -146,6 +146,30 @@ def template RegRegRegImmOpConstructor {{
     }
 }};
 
+def template RegRegRegOpDeclare {{
+class %(class_name)s : public %(base_class)s
+{
+  protected:
+    public:
+        // Constructor
+        %(class_name)s(ExtMachInst machInst,
+                       IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2);
+        %(BasicExecDeclare)s
+};
+}};
+
+def template RegRegRegOpConstructor {{
+    inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+                                          IntRegIndex _dest,
+                                          IntRegIndex _op1,
+                                          IntRegIndex _op2)
+        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
+                         _dest, _op1, _op2)
+    {
+        %(constructor)s;
+    }
+}};
+
 def template RegImmRegOpDeclare {{
 class %(class_name)s : public %(base_class)s
 {
-- 
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