From 344911b885114b8401482679202aaee89fa8b29b Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 4 Nov 2017 03:45:23 -0700 Subject: alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. In the ISA instruction definitions, some classes were declared with execute, etc., functions outside of the main template because they had CPU specific signatures and would need to be duplicated with each CPU plugged into them. Now that the instructions always just use an ExecContext, there's no reason for those templates to be separate. This change folds those templates together. Change-Id: I13bda247d3d1cc07c0ea06968e48aa5b4aace7fa Reviewed-on: https://gem5-review.googlesource.com/5401 Reviewed-by: Andreas Sandberg Reviewed-by: Alec Roelke Maintainer: Andreas Sandberg --- src/arch/arm/isa/templates/mult.isa | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/arch/arm/isa/templates/mult.isa') diff --git a/src/arch/arm/isa/templates/mult.isa b/src/arch/arm/isa/templates/mult.isa index 0099e5c9d..87d96f743 100644 --- a/src/arch/arm/isa/templates/mult.isa +++ b/src/arch/arm/isa/templates/mult.isa @@ -44,7 +44,7 @@ class %(class_name)s : public %(base_class)s // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _reg0, IntRegIndex _reg1, IntRegIndex _reg2); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; }; }}; @@ -73,7 +73,7 @@ class %(class_name)s : public %(base_class)s %(class_name)s(ExtMachInst machInst, IntRegIndex _reg0, IntRegIndex _reg1, IntRegIndex _reg2, IntRegIndex _reg3); - %(BasicExecDeclare)s + Fault execute(ExecContext *, Trace::InstRecord *) const; }; }}; -- cgit v1.2.3