From 4491170df6e7a130c43d38d4220e5dff3c1dd214 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:13 -0500
Subject: ARM: Make integer division by zero return a fault.

---
 src/arch/arm/isa/insts/div.isa | 14 ++++++++++++++
 src/arch/arm/isa/operands.isa  |  1 +
 2 files changed, 15 insertions(+)

(limited to 'src/arch/arm/isa')

diff --git a/src/arch/arm/isa/insts/div.isa b/src/arch/arm/isa/insts/div.isa
index b240e2967..302beb6b3 100644
--- a/src/arch/arm/isa/insts/div.isa
+++ b/src/arch/arm/isa/insts/div.isa
@@ -40,6 +40,13 @@
 let {{
     sdivCode = '''
     if (Op2.sw == 0) {
+        if (((SCTLR)Sctlr).dz) {
+#if FULL_SYSTEM
+            return new UndefinedInstruction;
+#else
+            return new UndefinedInstruction(false, mnemonic);
+#endif
+        }
         Dest.sw = 0;
     } else if (Op1.sw == INT_MIN && Op2.sw == -1) {
         Dest.sw = INT_MIN;
@@ -56,6 +63,13 @@ let {{
 
     udivCode = '''
     if (Op2.uw == 0) {
+        if (((SCTLR)Sctlr).dz) {
+#if FULL_SYSTEM
+            return new UndefinedInstruction;
+#else
+            return new UndefinedInstruction(false, mnemonic);
+#endif
+        }
         Dest.uw = 0;
     } else {
         Dest.uw = Op1.uw / Op2.uw;
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa
index 9f4a0ca2f..4c269276a 100644
--- a/src/arch/arm/isa/operands.isa
+++ b/src/arch/arm/isa/operands.isa
@@ -176,6 +176,7 @@ def operands {{
     'Fpsid': ('ControlReg', 'uw', 'MISCREG_FPSID', None, 2),
     'Fpscr': ('ControlReg', 'uw', 'MISCREG_FPSCR', None, 2),
     'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', None, 2),
+    'Sctlr': ('ControlReg', 'uw', 'MISCREG_SCTLR', None, 2),
     'SevMailbox': ('ControlReg', 'uw', 'MISCREG_SEV_MAILBOX', None, 2),
     'NPC': ('NPC', 'ud', None, (None, None, 'IsControl'), 2,
             readNPC, writeNPC),
-- 
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