From 4a1814bd524e7444f57dcd1ea24070fd7b375af3 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Mon, 15 Nov 2010 14:04:04 -0600
Subject: ARM: Return an FailUnimp instruction when an unimplemented CP15
 register is accessed.

Just panicing in readMiscReg() doesn't work because a speculative access
in the o3 model can end the simulation.
---
 src/arch/arm/isa/formats/misc.isa | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/arch/arm/isa')

diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa
index 2d47c286f..c2003fe6d 100644
--- a/src/arch/arm/isa/formats/misc.isa
+++ b/src/arch/arm/isa/formats/misc.isa
@@ -180,6 +180,10 @@ let {{
 
             // Read/write, priveleged only.
           default:
+            if (miscReg >= MISCREG_CP15_UNIMP_START)
+                return new FailUnimplemented(csprintf("%s %s",
+                    isRead ? "mrc" : "mcr", miscRegName[miscReg]).c_str(),
+                    machInst);
             if (isRead) {
                 return new Mrc15(machInst, rt, (IntRegIndex)miscReg);
             } else {
-- 
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