From 67766cbf17451559207d072eaf4fc6fb589a2656 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:12 -0500 Subject: ARM: Fix the implementation of the VFP ldm and stm macroops. There were four bugs in these instructions. First, the loaded value was being stored into a floating point register as floating point, changing the value as it was transfered. Second, the meaning of the "up" bit had been reversed. Third, the statically sized microop array wasn't bit enough for all possible inputs. It's now dynamically sized and should always be big enough. Fourth, the offset was stored as an unsigned 8 bit value. Negative offsets would look like moderately large positive offsets. --- src/arch/arm/isa/insts/macromem.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/arm/isa') diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index 781cbca7a..0870a966f 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -59,7 +59,7 @@ let {{ 'predicate_test': predicateTest}, ['IsMicroop']) - microLdrFpUopCode = "Fa = cSwap(Mem.uw, ((CPSR)Cpsr).e);" + microLdrFpUopCode = "Fa.uw = cSwap(Mem.uw, ((CPSR)Cpsr).e);" microLdrFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrFpUop', 'MicroMemOp', {'memacc_code': microLdrFpUopCode, -- cgit v1.2.3