From 08187e3916fa615444ed61d739ac91e284735a66 Mon Sep 17 00:00:00 2001
From: Matt Horsnell <Matt.Horsnell@arm.com>
Date: Thu, 1 Mar 2012 17:26:31 -0600
Subject: ARM: Add limited CP14 support.

New kernels attempt to read CP14 what debug architecture is available.
These changes add the debug registers and return that none is currently
available.
---
 src/arch/arm/miscregs.cc | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

(limited to 'src/arch/arm/miscregs.cc')

diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc
index c31818377..286ecc1de 100644
--- a/src/arch/arm/miscregs.cc
+++ b/src/arch/arm/miscregs.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010 ARM Limited
+ * Copyright (c) 2010-2012 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -45,6 +45,36 @@
 namespace ArmISA
 {
 
+MiscRegIndex
+decodeCP14Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2)
+{
+    switch(crn) {
+      case 0:
+        switch (opc2) {
+          case 0:
+            switch (crm) {
+              case 0:
+                return MISCREG_DBGDIDR;
+              case 1:
+                return MISCREG_DBGDSCR_INT;
+              default:
+                warn("CP14 unimplemented crn[%d], opc1[%d], crm[%d], opc2[%d]",
+                     crn, opc1, crm, opc2);
+                return NUM_MISCREGS;
+            }
+          default:
+                warn("CP14 unimplemented crn[%d], opc1[%d], crm[%d], opc2[%d]",
+                     crn, opc1, crm, opc2);
+                return NUM_MISCREGS;
+        }
+      default:
+        warn("CP14 unimplemented crn[%d], opc1[%d], crm[%d], opc2[%d]",
+             crn, opc1, crm, opc2);
+        return NUM_MISCREGS;
+    }
+
+}
+
 MiscRegIndex
 decodeCP15Reg(unsigned crn, unsigned opc1, unsigned crm, unsigned opc2)
 {
-- 
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