From 49538a71186d98f5440c5db646e23507fc2e38d1 Mon Sep 17 00:00:00 2001 From: Curtis Dunham Date: Tue, 2 Aug 2016 10:38:01 +0100 Subject: arm: enable EL2 support Change-Id: I59fa4fae98c33d9e5c2185382e1411911d27d341 --- src/arch/arm/miscregs.cc | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'src/arch/arm/miscregs.cc') diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc index 3a40a27b0..9514997e3 100644 --- a/src/arch/arm/miscregs.cc +++ b/src/arch/arm/miscregs.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2013, 2015 ARM Limited + * Copyright (c) 2010-2013, 2015-2016 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -2118,9 +2118,8 @@ canReadAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, ThreadContext *tc) case EL1: return secure ? miscRegInfo[reg][MISCREG_PRI_S_RD] : miscRegInfo[reg][MISCREG_PRI_NS_RD]; - // @todo: uncomment this to enable Virtualization - // case EL2: - // return miscRegInfo[reg][MISCREG_HYP_RD]; + case EL2: + return miscRegInfo[reg][MISCREG_HYP_RD]; case EL3: return secure ? miscRegInfo[reg][MISCREG_MON_NS0_RD] : miscRegInfo[reg][MISCREG_MON_NS1_RD]; @@ -2163,9 +2162,8 @@ canWriteAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, ThreadContext *tc) case EL1: return secure ? miscRegInfo[reg][MISCREG_PRI_S_WR] : miscRegInfo[reg][MISCREG_PRI_NS_WR]; - // @todo: uncomment this to enable Virtualization - // case EL2: - // return miscRegInfo[reg][MISCREG_HYP_WR]; + case EL2: + return miscRegInfo[reg][MISCREG_HYP_WR]; case EL3: return secure ? miscRegInfo[reg][MISCREG_MON_NS0_WR] : miscRegInfo[reg][MISCREG_MON_NS1_WR]; -- cgit v1.2.3