From 7798ffb6948d12c7f2bc63dc9a3263bb19aa3297 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Tue, 9 Jan 2018 10:10:04 +0000 Subject: arch-arm: Change function name for banked miscregs This commit changes the function's name used for retrieving the index of a security banked register given the flatten index. This will avoid confusion with flattenRegId, which has a different purpose. Change-Id: I470ffb55916cb7fc9f78e071a7f2e609c1829f1a Signed-off-by: Giacomo Travaglini Reviewed-by: Nikos Nikoleris Reviewed-on: https://gem5-review.googlesource.com/7982 Maintainer: Andreas Sandberg --- src/arch/arm/miscregs.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/arch/arm/miscregs.cc') diff --git a/src/arch/arm/miscregs.cc b/src/arch/arm/miscregs.cc index 445ba18cf..a9031fe0e 100644 --- a/src/arch/arm/miscregs.cc +++ b/src/arch/arm/miscregs.cc @@ -815,14 +815,14 @@ canWriteCoprocReg(MiscRegIndex reg, SCR scr, CPSR cpsr) } int -flattenMiscRegNsBanked(MiscRegIndex reg, ThreadContext *tc) +snsBankedIndex(MiscRegIndex reg, ThreadContext *tc) { SCR scr = tc->readMiscReg(MISCREG_SCR); - return flattenMiscRegNsBanked(reg, tc, scr.ns); + return snsBankedIndex(reg, tc, scr.ns); } int -flattenMiscRegNsBanked(MiscRegIndex reg, ThreadContext *tc, bool ns) +snsBankedIndex(MiscRegIndex reg, ThreadContext *tc, bool ns) { int reg_as_int = static_cast(reg); if (miscRegInfo[reg][MISCREG_BANKED]) { -- cgit v1.2.3