From c9c4dfc09dacd9dfc29655e78f7caa1fcc6dfce6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:11 -0500 Subject: ARM: Ignore attempts to disable coprocessors that aren't implemented anyway. --- src/arch/arm/miscregs.hh | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'src/arch/arm/miscregs.hh') diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh index 704450d1c..74be52c66 100644 --- a/src/arch/arm/miscregs.hh +++ b/src/arch/arm/miscregs.hh @@ -230,6 +230,25 @@ namespace ArmISA Bitfield<1> a; // Alignment fault checking Bitfield<0> m; // MMU enable bit EndBitUnion(SCTLR) + + BitUnion32(CPACR) + Bitfield<1, 0> cp0; + Bitfield<3, 2> cp1; + Bitfield<5, 4> cp2; + Bitfield<7, 6> cp3; + Bitfield<9, 8> cp4; + Bitfield<11, 10> cp5; + Bitfield<13, 12> cp6; + Bitfield<15, 14> cp7; + Bitfield<17, 16> cp8; + Bitfield<19, 18> cp9; + Bitfield<21, 20> cp10; + Bitfield<23, 22> cp11; + Bitfield<25, 24> cp12; + Bitfield<27, 26> cp13; + Bitfield<30> d32dis; + Bitfield<31> asedis; + EndBitUnion(CPACR) }; #endif // __ARCH_ARM_MISCREGS_HH__ -- cgit v1.2.3