From e21f93702ab8d03a8eddffc1a7b33f51af82e8c2 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 2 Jun 2010 12:58:13 -0500
Subject: ARM: Warn/ignore when TLB maintenance operations are performed.

---
 src/arch/arm/miscregs.hh | 39 ++++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 19 deletions(-)

(limited to 'src/arch/arm/miscregs.hh')

diff --git a/src/arch/arm/miscregs.hh b/src/arch/arm/miscregs.hh
index eac842307..4fd52fd1e 100644
--- a/src/arch/arm/miscregs.hh
+++ b/src/arch/arm/miscregs.hh
@@ -110,6 +110,20 @@ namespace ArmISA
         MISCREG_TTBR1,
         MISCREG_TLBTR,
         MISCREG_DACR,
+        MISCREG_TLBIALLIS,
+        MISCREG_TLBIMVAIS,
+        MISCREG_TLBIASIDIS,
+        MISCREG_TLBIMVAAIS,
+        MISCREG_ITLBIALL,
+        MISCREG_ITLBIMVA,
+        MISCREG_ITLBIASID,
+        MISCREG_DTLBIALL,
+        MISCREG_DTLBIMVA,
+        MISCREG_DTLBIASID,
+        MISCREG_TLBIALL,
+        MISCREG_TLBIMVA,
+        MISCREG_TLBIASID,
+        MISCREG_TLBIMVAA,
         MISCREG_CP15_UNIMP_START,
         MISCREG_CTR = MISCREG_CP15_UNIMP_START,
         MISCREG_TCMTR,
@@ -153,20 +167,6 @@ namespace ArmISA
         MISCREG_V2POWPW,
         MISCREG_V2POWUR,
         MISCREG_V2POWUW,
-        MISCREG_TLBIALLIS,
-        MISCREG_TLBIMVAIS,
-        MISCREG_TLBIASIDIS,
-        MISCREG_TLBIMVAAIS,
-        MISCREG_ITLBIALL,
-        MISCREG_ITLBIMVA,
-        MISCREG_ITLBIASID,
-        MISCREG_DTLBIALL,
-        MISCREG_DTLBIMVA,
-        MISCREG_DTLBIASID,
-        MISCREG_TLBIALL,
-        MISCREG_TLBIMVA,
-        MISCREG_TLBIASID,
-        MISCREG_TLBIMVAA,
         MISCREG_PRRR,
         MISCREG_NMRR,
         MISCREG_VBAR,
@@ -198,7 +198,12 @@ namespace ArmISA
         "clidr", "ccsidr", "csselr",
         "icialluis", "iciallu", "icimvau",
         "bpimva", "bpiallis", "bpiall",
-        "midr", "ttbr0", "ttbr1", "tlbtr", "dacr", "ctr", "tcmtr", "mpidr",
+        "midr", "ttbr0", "ttbr1", "tlbtr", "dacr",
+        "tlbiallis", "tlbimvais", "tlbiasidis", "tlbimvaais",
+        "itlbiall", "itlbimva", "itlbiasid",
+        "dtlbiall", "dtlbimva", "dtlbiasid",
+        "tlbiall", "tlbimva", "tlbiasid", "tlbimvaa",
+        "ctr", "tcmtr", "mpidr",
         "id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
         "id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
         "id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
@@ -209,10 +214,6 @@ namespace ArmISA
         "scr", "sder", "nsacr", "ttbcr",
         "v2pcwpr", "v2pcwpw", "v2pcwur", "v2pcwuw",
         "v2powpr", "v2powpw", "v2powur", "v2powuw",
-        "tlbiallis", "tlbimvais", "tlbiasidis", "tlbimvaais",
-        "itlbiall", "itlbimva", "itlbiasid",
-        "dtlbiall", "dtlbimva", "dtlbiasid",
-        "tlbiall", "tlbimva", "tlbiasid", "tlbimvaa",
         "prrr", "nmrr", "vbar", "mvbar", "isr", "fceidr",
         "nop", "raz"
     };
-- 
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