From fce9c7a26f8c8a29d51c319c876a7bf0a32404a7 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 24 Apr 2019 17:19:23 -0700 Subject: mem: Remove the ISA specialized versions of port proxy's read/write. These selected their behavior based on ifdefs and had to be disabled when on the NULL ISA. The versions which take an explicit endianness have been renamed to just read/write instead of readGtoH and writeHtoG since the direction of the translation is obvious from context. Change-Id: I6cfbfda6c4481962d442d3370534e50532d41814 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18372 Reviewed-by: Gabe Black Maintainer: Gabe Black Tested-by: kokoro --- src/arch/arm/semihosting.cc | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) (limited to 'src/arch/arm/semihosting.cc') diff --git a/src/arch/arm/semihosting.cc b/src/arch/arm/semihosting.cc index 51107cbf7..3f9c0955c 100644 --- a/src/arch/arm/semihosting.cc +++ b/src/arch/arm/semihosting.cc @@ -176,7 +176,7 @@ ArmSemihosting::call64(ThreadContext *tc, uint32_t op, uint64_t param) DPRINTF(Semihosting, "Semihosting call64: %s(0x%x)\n", call->name, param); argv[0] = param; for (int i = 0; i < call->argc64; ++i) { - argv[i + 1] = proxy.readGtoH(param + i * 8, endian); + argv[i + 1] = proxy.read(param + i * 8, endian); DPRINTF(Semihosting, "\t: 0x%x\n", argv[i + 1]); } @@ -211,7 +211,7 @@ ArmSemihosting::call32(ThreadContext *tc, uint32_t op, uint32_t param) DPRINTF(Semihosting, "Semihosting call32: %s(0x%x)\n", call->name, param); argv[0] = param; for (int i = 0; i < call->argc32; ++i) { - argv[i + 1] = proxy.readGtoH(param + i * 4, endian); + argv[i + 1] = proxy.read(param + i * 4, endian); DPRINTF(Semihosting, "\t: 0x%x\n", argv[i + 1]); } @@ -556,9 +556,9 @@ ArmSemihosting::callGetCmdLine(ThreadContext *tc, bool aarch64, (const uint8_t *)cmdLine.c_str(), cmdLine.size() + 1); if (aarch64) - proxy.writeHtoG(argv[0] + 1 * 8, cmdLine.size(), endian); + proxy.write(argv[0] + 1 * 8, cmdLine.size(), endian); else - proxy.writeHtoG(argv[0] + 1 * 4, cmdLine.size(), endian); + proxy.write(argv[0] + 1 * 4, cmdLine.size(), endian); return retOK(0); } else { return retError(0); @@ -609,15 +609,15 @@ ArmSemihosting::callHeapInfo(ThreadContext *tc, bool aarch64, PortProxy &proxy = physProxy(tc); ByteOrder endian = ArmISA::byteOrder(tc); if (aarch64) { - proxy.writeHtoG(base + 0 * 8, heap_base, endian); - proxy.writeHtoG(base + 1 * 8, heap_limit, endian); - proxy.writeHtoG(base + 2 * 8, stack_base, endian); - proxy.writeHtoG(base + 3 * 8, stack_limit, endian); + proxy.write(base + 0 * 8, heap_base, endian); + proxy.write(base + 1 * 8, heap_limit, endian); + proxy.write(base + 2 * 8, stack_base, endian); + proxy.write(base + 3 * 8, stack_limit, endian); } else { - proxy.writeHtoG(base + 0 * 4, heap_base, endian); - proxy.writeHtoG(base + 1 * 4, heap_limit, endian); - proxy.writeHtoG(base + 2 * 4, stack_base, endian); - proxy.writeHtoG(base + 3 * 4, stack_limit, endian); + proxy.write(base + 0 * 4, heap_base, endian); + proxy.write(base + 1 * 4, heap_limit, endian); + proxy.write(base + 2 * 4, stack_base, endian); + proxy.write(base + 3 * 4, stack_limit, endian); } return retOK(0); @@ -666,10 +666,10 @@ ArmSemihosting::callElapsed(ThreadContext *tc, bool aarch64, const uint64_t tick = semiTick(curTick()); if (aarch64) { - proxy.writeHtoG(argv[0], tick, endian); + proxy.write(argv[0], tick, endian); } else { - proxy.writeHtoG(argv[0] + 0 * 4, tick, endian); - proxy.writeHtoG(argv[0] + 1 * 4, tick >> 32, endian); + proxy.write(argv[0] + 0 * 4, tick, endian); + proxy.write(argv[0] + 1 * 4, tick >> 32, endian); } return retOK(0); -- cgit v1.2.3