From f29e09746a1380eb43d2309de37d56beec9afab7 Mon Sep 17 00:00:00 2001
From: Gene Wu <Gene.Wu@arm.com>
Date: Mon, 23 Aug 2010 11:18:41 -0500
Subject: ARM: Fix Uncachable TLB requests and decoding of xn bit

---
 src/arch/arm/table_walker.cc | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'src/arch/arm/table_walker.cc')

diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc
index e17e15054..6dcb387a3 100644
--- a/src/arch/arm/table_walker.cc
+++ b/src/arch/arm/table_walker.cc
@@ -165,8 +165,12 @@ TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint8_t _cid, TLB::Mode _
         assert(stateQueue.size() < 5);
         currState = NULL;
     } else {
+        Request::Flags flag = 0;
+        if (currState->sctlr.c == 0){
+           flag = Request::UNCACHEABLE;
+        }
         port->dmaAction(MemCmd::ReadReq, l1desc_addr, sizeof(uint32_t),
-                NULL, (uint8_t*)&currState->l1Desc.data, (Tick)0);
+                NULL, (uint8_t*)&currState->l1Desc.data, (Tick)0, flag);
         doL1Descriptor();
         f = currState->fault;
     }
-- 
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