From fe8faa62b74087febe227f69385db3e562682799 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Tue, 29 May 2018 16:30:33 +0100 Subject: arch-arm: Add Illegal Execution flag to PCState This patch moves the detection of the Illegal Execution flag (PSTATE.IL) from the tlb translation stage (fetch) to the decoding stage. This is done by adding the illegalExecution field to the PCState. Change-Id: I9c1c4e9c6bd5ded905c1d56b3034e4e9322582fa Signed-off-by: Giacomo Travaglini Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/10813 Maintainer: Andreas Sandberg --- src/arch/arm/tlb.cc | 5 ----- 1 file changed, 5 deletions(-) (limited to 'src/arch/arm/tlb.cc') diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index d2153e779..79eef1b8d 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -1145,11 +1145,6 @@ TLB::translateFs(const RequestPtr &req, ThreadContext *tc, Mode mode, } if (fault == NoFault) { - // Generate Illegal Inst Set State fault if IL bit is set in CPSR - if (aarch64 && is_fetch && cpsr.il == 1) { - return std::make_shared(); - } - // Don't try to finalize a physical address unless the // translation has completed (i.e., there is a table entry). return te ? finalizePhysical(req, tc, mode) : NoFault; -- cgit v1.2.3