From 194d650536cb49c374efdb1fe0473b3eec5dea1e Mon Sep 17 00:00:00 2001 From: Brandon Potter Date: Fri, 4 May 2018 17:55:24 -0400 Subject: syscall_emul: expand AuxVector class The AuxVector class is responsible for holding Process data. The data that it holds is normally setup by an OS kernel in the process address space. The purpose behind doing this is to pass in information that the process will need for various reasons. (Check out the enum in the header file for an idea of what the AuxVector holds.) The AuxVector struct was changed into a class and encapsulation methods were added to protect access to the member variables. The host ISA may have a different endianness than the simulated ISA. Since data is passed between the process address space and the simulator for auxiliary vectors, we need to worry about maintaining endianness for the right context. Change-Id: I32c5ac4b679559886e1efeb4b5483b92dfc94af9 Reviewed-on: https://gem5-review.googlesource.com/12109 Reviewed-by: Jason Lowe-Power Maintainer: Anthony Gutierrez --- src/arch/arm/process.cc | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) (limited to 'src/arch/arm') diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc index 1bb23dec2..0c1d18bb1 100644 --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -346,14 +346,14 @@ ArmProcess::argsInit(int pageSize, IntRegIndex spIndex) //Fix up the aux vectors which point to other data for (int i = auxv.size() - 1; i >= 0; i--) { - if (auxv[i].a_type == M5_AT_PLATFORM) { - auxv[i].a_val = platform_base; + if (auxv[i].getHostAuxType() == M5_AT_PLATFORM) { + auxv[i].setAuxVal(platform_base); initVirtMem.writeString(platform_base, platform.c_str()); - } else if (auxv[i].a_type == M5_AT_EXECFN) { - auxv[i].a_val = aux_data_base; + } else if (auxv[i].getHostAuxType() == M5_AT_EXECFN) { + auxv[i].setAuxVal(aux_data_base); initVirtMem.writeString(aux_data_base, filename.c_str()); - } else if (auxv[i].a_type == M5_AT_RANDOM) { - auxv[i].a_val = aux_random_base; + } else if (auxv[i].getHostAuxType() == M5_AT_RANDOM) { + auxv[i].setAuxVal(aux_random_base); // Just leave the value 0, we don't want randomness } } @@ -361,9 +361,11 @@ ArmProcess::argsInit(int pageSize, IntRegIndex spIndex) //Copy the aux stuff for (int x = 0; x < auxv.size(); x++) { initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, - (uint8_t*)&(auxv[x].a_type), intSize); + (uint8_t*)&(auxv[x].getAuxType()), + intSize); initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, - (uint8_t*)&(auxv[x].a_val), intSize); + (uint8_t*)&(auxv[x].getAuxVal()), + intSize); } //Write out the terminating zeroed auxilliary vector const uint64_t zero = 0; -- cgit v1.2.3