From 5ebf3b280867925917654f5362d3ece21dc2355e Mon Sep 17 00:00:00 2001
From: Matt Horsnell <Matt.Horsnell@arm.com>
Date: Tue, 18 Jan 2011 16:30:02 -0600
Subject: O3: Fixes the way prefetches are handled inside the iew unit.

This patch prevents the prefetch being added to the instCommit queue twice.
---
 src/arch/arm/faults.hh | 3 ++-
 src/arch/arm/tlb.cc    | 8 +++++++-
 2 files changed, 9 insertions(+), 2 deletions(-)

(limited to 'src/arch/arm')

diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index 6c1b223ab..633e74eae 100644
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -92,7 +92,8 @@ class ArmFault : public FaultBase
         // to allow the translation function to inform
         // the memory access function not to proceed
         // for a Prefetch that misses in the TLB.
-        PrefetchTLBMiss
+        PrefetchTLBMiss = 0x1f,
+        PrefetchUncacheable = 0x20
     };
 
     struct FaultVals
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index f142e03f8..e5f5b36f6 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -556,9 +556,15 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode,
             outerAttrs: %d\n",
             te->shareable, te->innerAttrs, te->outerAttrs);
     setAttr(te->attributes);
-    if (te->nonCacheable)
+    if (te->nonCacheable) {
         req->setFlags(Request::UNCACHEABLE);
 
+        // Prevent prefetching from I/O devices.
+        if (req->isPrefetch()) {
+            return new PrefetchAbort(vaddr, ArmFault::PrefetchUncacheable);
+        }
+    }
+
     switch ( (dacr >> (te->domain * 2)) & 0x3) {
       case 0:
         domainFaults++;
-- 
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