From a00b44ebe8dd5fdc47b5b4acbc7507e578b3f1f2 Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Thu, 17 Apr 2014 16:55:54 -0500
Subject: arm: allow DC instructions by default so SE mode works

---
 src/arch/arm/isa.cc | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/arch/arm')

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 5f8378e09..38607a9ae 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -200,6 +200,8 @@ ISA::clear()
     sctlr.rao2 = 1;
     sctlr.rao3 = 1;
     sctlr.rao4 = 0xf;  // SCTLR[6:3]
+    sctlr.uci = 1;
+    sctlr.dze = 1;
     miscRegs[MISCREG_SCTLR_NS] = sctlr;
     miscRegs[MISCREG_SCTLR_RST] = sctlr_rst;
     miscRegs[MISCREG_HCPTR] = 0;
-- 
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