From b192aed7e73a60d49bf560c0c8c478dfcf219de1 Mon Sep 17 00:00:00 2001
From: Chun-Chen TK Hsu <chunchenhsu@google.com>
Date: Tue, 20 Aug 2019 18:21:49 +0800
Subject: arch-arm: Fix implicit fallthrough build errors

1942b21713 introduced implicit-fallthrough errors when compiled with
GCC 8.  This change adds M5_UNREACHABLE in the default case.

Change-Id: I220f2b3fe39b5c3a65c0dd390915bffeafb28962
Signed-off-by: Chun-Chen TK Hsu <chunchenhsu@google.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20268
Reviewed-by: Jordi Vaquero <jordi.vaquero@metempsy.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---
 src/arch/arm/isa/formats/aarch64.isa | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

(limited to 'src/arch/arm')

diff --git a/src/arch/arm/isa/formats/aarch64.isa b/src/arch/arm/isa/formats/aarch64.isa
index dbe7e28b0..838ceddbb 100644
--- a/src/arch/arm/isa/formats/aarch64.isa
+++ b/src/arch/arm/isa/formats/aarch64.isa
@@ -652,6 +652,8 @@ namespace Aarch64
                             return new SWPLA64(machInst, rt, rnsp, rs);
                         else
                             return new LDADDLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             case 0x1:
                 switch(size_ar){
@@ -711,6 +713,8 @@ namespace Aarch64
                         return new LDCLRA64(machInst, rt, rnsp, rs);
                     case 0xf:
                         return new LDCLRLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             case 0x2:
                 switch(size_ar){
@@ -770,6 +774,8 @@ namespace Aarch64
                         return new LDEORA64(machInst, rt, rnsp, rs);
                     case 0xf:
                         return new LDEORLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             case 0x3:
                 switch(size_ar){
@@ -829,6 +835,8 @@ namespace Aarch64
                         return new LDSETA64(machInst, rt, rnsp, rs);
                     case 0xf:
                         return new LDSETLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             case 0x4:
                 switch(size_ar){
@@ -888,6 +896,8 @@ namespace Aarch64
                         return new LDSMAXA64(machInst, rt, rnsp, rs);
                     case 0xf:
                         return new LDSMAXLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             case 0x5:
                 switch(size_ar){
@@ -947,6 +957,8 @@ namespace Aarch64
                         return new LDSMINA64(machInst, rt, rnsp, rs);
                     case 0xf:
                         return new LDSMINLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             case 0x6:
                 switch(size_ar){
@@ -1006,6 +1018,8 @@ namespace Aarch64
                         return new LDUMAXA64(machInst, rt, rnsp, rs);
                     case 0xf:
                         return new LDUMAXLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             case 0x7:
                 switch(size_ar){
@@ -1065,6 +1079,8 @@ namespace Aarch64
                         return new LDUMINA64(machInst, rt, rnsp, rs);
                     case 0xf:
                         return new LDUMINLA64(machInst, rt, rnsp, rs);
+                    default:
+                        M5_UNREACHABLE;
                 }
             default:
                 return new Unknown64(machInst);
-- 
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