From eae1e97fb002b44a9d8c46df2da1ddc1d0156ce4 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 25 May 2012 00:55:24 -0700 Subject: ISA: Make the decode function part of the ISA's decoder. --- src/arch/arm/SConscript | 1 + src/arch/arm/decoder.cc | 38 ++++++++++++++++++++++++++++++++++++++ src/arch/arm/decoder.hh | 24 +++++++++++++++++++++--- src/arch/arm/isa/includes.isa | 1 + 4 files changed, 61 insertions(+), 3 deletions(-) create mode 100644 src/arch/arm/decoder.cc (limited to 'src/arch/arm') diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript index 171c04718..0f94455bd 100644 --- a/src/arch/arm/SConscript +++ b/src/arch/arm/SConscript @@ -47,6 +47,7 @@ if env['TARGET_ISA'] == 'arm': # Workaround for bug in SCons version > 0.97d20071212 # Scons bug id: 2006 M5 Bug id: 308 Dir('isa/formats') + Source('decoder.cc') Source('faults.cc') Source('insts/macromem.cc') Source('insts/mem.cc') diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc new file mode 100644 index 000000000..be46ff540 --- /dev/null +++ b/src/arch/arm/decoder.cc @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011 Google + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include "arch/arm/decoder.hh" + +namespace ArmISA +{ + +DecodeCache Decoder::defaultCache; + +} diff --git a/src/arch/arm/decoder.hh b/src/arch/arm/decoder.hh index 5525b4a89..a91d70f48 100644 --- a/src/arch/arm/decoder.hh +++ b/src/arch/arm/decoder.hh @@ -31,13 +31,31 @@ #ifndef __ARCH_ARM_DECODER_HH__ #define __ARCH_ARM_DECODER_HH__ -#include "arch/generic/decoder.hh" +#include "arch/types.hh" +#include "cpu/decode_cache.hh" +#include "cpu/static_inst_fwd.hh" namespace ArmISA { -class Decoder : public GenericISA::Decoder -{}; +class Decoder +{ + protected: + /// A cache of decoded instruction objects. + static DecodeCache defaultCache; + + public: + StaticInstPtr decodeInst(ExtMachInst mach_inst); + + /// Decode a machine instruction. + /// @param mach_inst The binary instruction to decode. + /// @retval A pointer to the corresponding StaticInst object. + StaticInstPtr + decode(ExtMachInst mach_inst, Addr addr) + { + return defaultCache.decode(this, mach_inst, addr); + } +}; } // namespace ArmISA diff --git a/src/arch/arm/isa/includes.isa b/src/arch/arm/isa/includes.isa index 607a5c8b8..5dd13d623 100644 --- a/src/arch/arm/isa/includes.isa +++ b/src/arch/arm/isa/includes.isa @@ -63,6 +63,7 @@ output header {{ }}; output decoder {{ +#include "arch/arm/decoder.hh" #include "arch/arm/faults.hh" #include "arch/arm/intregs.hh" #include "arch/arm/isa_traits.hh" -- cgit v1.2.3