From 4e8d2d1593475008b926829e6944a59963166079 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Fri, 2 Mar 2007 22:34:51 -0500 Subject: make ldtw(a) -- Twin 32 bit load work correctly -- by doing it the same way as the twin 64 bit loads src/arch/isa_parser.py: src/arch/sparc/isa/decoder.isa: src/arch/sparc/isa/operands.isa: src/base/bigint.hh: src/cpu/simple/atomic.cc: src/cpu/simple/timing.cc: src/mem/packet_access.hh: make ldtw(a) Twin 32 bit load work correctly --HG-- extra : convert_revision : 2646b269d58cc1774e896065875a56cf5e313b42 --- src/arch/isa_parser.py | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'src/arch/isa_parser.py') diff --git a/src/arch/isa_parser.py b/src/arch/isa_parser.py index 39500df36..9b63c8842 100755 --- a/src/arch/isa_parser.py +++ b/src/arch/isa_parser.py @@ -1124,9 +1124,12 @@ def buildOperandTypeMap(userDict, lineno): ctype = 'float' elif size == 64: ctype = 'double' - elif desc == 'twin int': + elif desc == 'twin64 int': is_signed = 0 ctype = 'Twin64_t' + elif desc == 'twin32 int': + is_signed = 0 + ctype = 'Twin32_t' if ctype == '': error(lineno, 'Unrecognized type description "%s" in userDict') operandTypeMap[ext] = (size, ctype, is_signed) @@ -1159,7 +1162,7 @@ class Operand(object): # template must be careful not to use it if it doesn't apply. if self.isMem(): self.mem_acc_size = self.makeAccSize() - if self.ctype == 'Twin64_t': + if self.ctype in ['Twin32_t', 'Twin64_t']: self.mem_acc_type = 'Twin' else: self.mem_acc_type = 'uint' @@ -1392,7 +1395,7 @@ class MemOperand(Operand): # Note that initializations in the declarations are solely # to avoid 'uninitialized variable' errors from the compiler. # Declare memory data variable. - if self.ctype == 'Twin64_t': + if self.ctype in ['Twin32_t','Twin64_t']: return "%s %s; %s.a = 0; %s.b = 0;\n" % (self.ctype, self.base_name, self.base_name, self.base_name) c = '%s %s = 0;\n' % (self.ctype, self.base_name) -- cgit v1.2.3