From 60577eb4caff66a756f260bff6bf3bf8cb7edcba Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 10 Jul 2009 01:21:04 -0700 Subject: ISAs: Get rid of the IControl operand type. A separate operand type is not necessary to use two bitfields to generate the index. --- src/arch/mips/isa/operands.isa | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'src/arch/mips/isa/operands.isa') diff --git a/src/arch/mips/isa/operands.isa b/src/arch/mips/isa/operands.isa index 609708a13..c2733be9d 100644 --- a/src/arch/mips/isa/operands.isa +++ b/src/arch/mips/isa/operands.isa @@ -113,10 +113,7 @@ def operands {{ 'Index':('ControlReg','uw','MipsISA::Index',None,1), - #Special cases for when a Control Register Access is dependent on - #a combination of bitfield indices (handles MTCO & MFCO) - # Fixed to allow CP0 Register Offset - 'CP0_RD_SEL': ('IControlReg', 'uw', '(RD << 3 | SEL) + Ctrl_Base_DepTag', None, 1), + 'CP0_RD_SEL': ('ControlReg', 'uw', '(RD << 3 | SEL)', None, 1), #MT Control Regs 'MVPConf0': ('ControlReg', 'uw', 'MipsISA::MVPConf0', None, 1), -- cgit v1.2.3