From b289966a7817487d05bdf9722786a1216032978a Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 16 Oct 2010 00:00:54 -0700 Subject: Mem: Reclaim some request flags used by MIPS for alignment checking. These flags were being used to identify what alignment a request needed, but the same information is available using the request size. This change also eliminates the isMisaligned function. If more complicated alignment checks are needed, they can be signaled using the ASI_BITS space in the flags vector like is currently done with ARM. --- src/arch/mips/isa/decoder.isa | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'src/arch/mips/isa') diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa index 36533e076..9832937b5 100644 --- a/src/arch/mips/isa/decoder.isa +++ b/src/arch/mips/isa/decoder.isa @@ -2491,12 +2491,11 @@ decode OPCODE_HI default Unknown::unknown() { 0x4: decode OPCODE_LO { format LoadMemory { - 0x0: lb({{ Rt.sw = Mem.sb; }}, mem_flags = NO_ALIGN_FAULT); - 0x1: lh({{ Rt.sw = Mem.sh; }}, mem_flags = NO_HALF_WORD_ALIGN_FAULT); + 0x0: lb({{ Rt.sw = Mem.sb; }}); + 0x1: lh({{ Rt.sw = Mem.sh; }}); 0x3: lw({{ Rt.sw = Mem.sw; }}); - 0x4: lbu({{ Rt.uw = Mem.ub;}}, mem_flags = NO_ALIGN_FAULT); - 0x5: lhu({{ Rt.uw = Mem.uh; }}, - mem_flags = NO_HALF_WORD_ALIGN_FAULT); + 0x4: lbu({{ Rt.uw = Mem.ub;}}); + 0x5: lhu({{ Rt.uw = Mem.uh; }}); } format LoadUnalignedMemory { @@ -2514,9 +2513,8 @@ decode OPCODE_HI default Unknown::unknown() { 0x5: decode OPCODE_LO { format StoreMemory { - 0x0: sb({{ Mem.ub = Rt<7:0>; }}, mem_flags = NO_ALIGN_FAULT); - 0x1: sh({{ Mem.uh = Rt<15:0>; }}, - mem_flags = NO_HALF_WORD_ALIGN_FAULT); + 0x0: sb({{ Mem.ub = Rt<7:0>; }}); + 0x1: sh({{ Mem.uh = Rt<15:0>; }}); 0x3: sw({{ Mem.uw = Rt<31:0>; }}); } -- cgit v1.2.3