From 11f7344cdc215e6950e54f53956e4298ed1fee2b Mon Sep 17 00:00:00 2001
From: Gabe Black <gabeblack@google.com>
Date: Thu, 9 Jan 2020 02:46:30 -0800
Subject: arch: Get rid of the unused (and mostly undefined) zeroRegisters.

Change-Id: Iadf56e4e742506af7ae4b617d2dc5a56439aa407
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24188
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---
 src/arch/mips/utility.cc | 11 -----------
 src/arch/mips/utility.hh |  3 ---
 2 files changed, 14 deletions(-)

(limited to 'src/arch/mips')

diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc
index 495845d7f..24c451d3e 100644
--- a/src/arch/mips/utility.cc
+++ b/src/arch/mips/utility.cc
@@ -217,17 +217,6 @@ isSnan(void *val_ptr, int size)
     }
 }
 
-template <class CPU>
-void
-zeroRegisters(CPU *cpu)
-{
-    // Insure ISA semantics
-    // (no longer very clean due to the change in setIntReg() in the
-    // cpu model.  Consider changing later.)
-    cpu->thread->setIntReg(ZeroReg, 0);
-    cpu->thread->setFloatReg(ZeroReg, 0);
-}
-
 void
 startupCPU(ThreadContext *tc, int cpuId)
 {
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index dde386cbc..0cd066f3e 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -87,9 +87,6 @@ inUserMode(ThreadContext *tc)
     }
 }
 
-template <class CPU>
-void zeroRegisters(CPU *cpu);
-
 ////////////////////////////////////////////////////////////////////////
 //
 //  Translation stuff
-- 
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