From 6bed6e0352a68723ea55017b3e09a8c279af11ec Mon Sep 17 00:00:00 2001
From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Fri, 24 Jan 2014 15:29:30 -0600
Subject: cpu: Add CPU support for generatig wake up events when LLSC adresses
 are snooped.

This patch add support for generating wake-up events in the CPU when an address
that is currently in the exclusive state is hit by a snoop. This mechanism is required
for ARMv8 multi-processor support.
---
 src/arch/mips/locked_mem.hh | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

(limited to 'src/arch/mips')

diff --git a/src/arch/mips/locked_mem.hh b/src/arch/mips/locked_mem.hh
index b4003fea9..5b0f8a1b8 100644
--- a/src/arch/mips/locked_mem.hh
+++ b/src/arch/mips/locked_mem.hh
@@ -86,9 +86,15 @@ handleLockedRead(XC *xc, Request *req)
             req->threadId(), req->getPaddr() & ~0xf);
 }
 
+template <class XC>
+inline void
+handleLockedSnoopHit(XC *xc)
+{
+}
+
 template <class XC>
 inline bool
-handleLockedWrite(XC *xc, Request *req)
+handleLockedWrite(XC *xc, Request *req, Addr cacheBlockMask)
 {
     if (req->isUncacheable()) {
         // Funky Turbolaser mailbox access...don't update
-- 
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