From c55a467a06eaa59c47c52a2adddc266b8e545589 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Sun, 2 Nov 2008 21:56:57 -0500 Subject: make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered across the subclasses. generally make it so that member data is _cpuId and accessor functions are cpuId(). The ID val comes from the python (default -1 if none provided), and if it is -1, the index of cpuList will be given. this has passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard switch. --- src/arch/mips/locked_mem.hh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/mips') diff --git a/src/arch/mips/locked_mem.hh b/src/arch/mips/locked_mem.hh index 07dc9d588..5877b1439 100644 --- a/src/arch/mips/locked_mem.hh +++ b/src/arch/mips/locked_mem.hh @@ -85,7 +85,7 @@ handleLockedWrite(XC *xc, Request *req) if (stCondFailures % 10 == 0) { warn("%i: cpu %d: %d consecutive " "store conditional failures\n", - curTick, xc->readCpuId(), stCondFailures); + curTick, xc->cpuId(), stCondFailures); } if (stCondFailures == 5000) { -- cgit v1.2.3