From c69d48f007d2521fdbea52a0a7a95cfc4a547174 Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <steve.reinhardt@amd.com>
Date: Mon, 3 Jan 2011 14:35:43 -0800
Subject: Make commenting on close namespace brackets consistent.

Ran all the source files through 'perl -pi' with this script:

s|\s*(};?\s*)?/\*\s*(end\s*)?namespace\s*(\S+)\s*\*/(\s*})?|} // namespace $3|;
s|\s*};?\s*//\s*(end\s*)?namespace\s*(\S+)\s*|} // namespace $2\n|;
s|\s*};?\s*//\s*(\S+)\s*namespace\s*|} // namespace $1\n|;

Also did a little manual editing on some of the arch/*/isa_traits.hh files
and src/SConscript.
---
 src/arch/mips/dsp.hh              | 2 +-
 src/arch/mips/faults.hh           | 2 +-
 src/arch/mips/isa_traits.hh       | 4 ++--
 src/arch/mips/kernel_stats.hh     | 4 ++--
 src/arch/mips/linux/threadinfo.hh | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)

(limited to 'src/arch/mips')

diff --git a/src/arch/mips/dsp.hh b/src/arch/mips/dsp.hh
index a3d6c1a8f..1cca51384 100755
--- a/src/arch/mips/dsp.hh
+++ b/src/arch/mips/dsp.hh
@@ -199,6 +199,6 @@ void simdUnpack(int32_t reg, uint64_t *values_ptr, int32_t fmt, int32_t sign);
 void writeDSPControl(uint32_t *dspctl, uint32_t value, uint32_t mask);
 uint32_t readDSPControl(uint32_t *dspctl, uint32_t mask);
 
-} /* namespace MipsISA */
+} // namespace MipsISA
 
 #endif // __ARCH_MIPS_DSP_HH__
diff --git a/src/arch/mips/faults.hh b/src/arch/mips/faults.hh
index 083aa5939..616886745 100644
--- a/src/arch/mips/faults.hh
+++ b/src/arch/mips/faults.hh
@@ -596,6 +596,6 @@ class DspStateDisabledFault : public MipsFault
             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 };
 
-} // MipsISA namespace
+} // namespace MipsISA
 
 #endif // __MIPS_FAULTS_HH__
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index efb1fb594..648713926 100644
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -39,7 +39,7 @@
 #include "base/types.hh"
 #include "config/full_system.hh"
 
-namespace LittleEndianGuest {};
+namespace LittleEndianGuest {}
 
 class StaticInstPtr;
 
@@ -164,6 +164,6 @@ const uint32_t ITOUCH_ANNOTE = 0xffffffff;
 // Memory accesses cannot be unaligned
 const bool HasUnalignedMemAcc = false;
 
-};
+} // namespace MipsISA
 
 #endif // __ARCH_MIPS_ISA_TRAITS_HH__
diff --git a/src/arch/mips/kernel_stats.hh b/src/arch/mips/kernel_stats.hh
index f14c6f851..5cf6087c8 100644
--- a/src/arch/mips/kernel_stats.hh
+++ b/src/arch/mips/kernel_stats.hh
@@ -48,7 +48,7 @@ class Statistics : public ::Kernel::Statistics
 };
 
 
-} /* end namespace MipsISA::Kernel */
-} /* end namespace MipsISA */
+} // namespace MipsISA::Kernel
+} // namespace MipsISA
 
 #endif // __ARCH_MIPS_KERNEL_STATS_HH__
diff --git a/src/arch/mips/linux/threadinfo.hh b/src/arch/mips/linux/threadinfo.hh
index b0d0cd811..20a4033dd 100644
--- a/src/arch/mips/linux/threadinfo.hh
+++ b/src/arch/mips/linux/threadinfo.hh
@@ -148,6 +148,6 @@ class ThreadInfo
     }
 };
 
-/* namespace Linux */ }
+} // namespace Linux
 
 #endif // __ARCH_MIPS_LINUX_LINUX_THREADINFO_HH__
-- 
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