From 5e8287d2e2eaf058495442ea9e32fafc343a0b53 Mon Sep 17 00:00:00 2001 From: Nathanael Premillieu Date: Wed, 5 Apr 2017 12:46:06 -0500 Subject: arch, cpu: Architectural Register structural indexing Replace the unified register mapping with a structure associating a class and an index. It is now much easier to know which class of register the index is referring to. Also, when adding a new class there is no need to modify existing ones. Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373 Reviewed-by: Andreas Sandberg [ Fix RISCV build issues ] Signed-off-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/2700 --- src/arch/null/registers.hh | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/arch/null/registers.hh') diff --git a/src/arch/null/registers.hh b/src/arch/null/registers.hh index 1e52fc5a6..6d1ecf1c5 100644 --- a/src/arch/null/registers.hh +++ b/src/arch/null/registers.hh @@ -40,6 +40,7 @@ #ifndef __ARCH_NULL_REGISTERS_HH__ #define __ARCH_NULL_REGISTERS_HH__ +#include "arch/types.hh" #include "base/types.hh" namespace NullISA { @@ -49,6 +50,7 @@ typedef uint32_t FloatRegBits; typedef float FloatReg; typedef uint8_t CCReg; typedef uint64_t MiscReg; +const RegIndex ZeroReg = 0; } -- cgit v1.2.3