From 608641e23c7f2288810c3f23a1a63790b664f2ab Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Sun, 26 Jul 2015 10:21:20 -0500 Subject: cpu: implements vector registers This adds a vector register type. The type is defined as a std::array of a fixed number of uint64_ts. The isa_parser.py has been modified to parse vector register operands and generate the required code. Different cpus have vector register files now. --- src/arch/null/registers.hh | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/arch/null') diff --git a/src/arch/null/registers.hh b/src/arch/null/registers.hh index 1e52fc5a6..3f1524554 100644 --- a/src/arch/null/registers.hh +++ b/src/arch/null/registers.hh @@ -49,6 +49,8 @@ typedef uint32_t FloatRegBits; typedef float FloatReg; typedef uint8_t CCReg; typedef uint64_t MiscReg; +typedef uint64_t VectorRegElement; +typedef std::array VectorReg; } -- cgit v1.2.3