From 608641e23c7f2288810c3f23a1a63790b664f2ab Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Sun, 26 Jul 2015 10:21:20 -0500 Subject: cpu: implements vector registers This adds a vector register type. The type is defined as a std::array of a fixed number of uint64_ts. The isa_parser.py has been modified to parse vector register operands and generate the required code. Different cpus have vector register files now. --- src/arch/power/insts/static_inst.cc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/arch/power/insts') diff --git a/src/arch/power/insts/static_inst.cc b/src/arch/power/insts/static_inst.cc index 087e1f740..5bd16b40d 100644 --- a/src/arch/power/insts/static_inst.cc +++ b/src/arch/power/insts/static_inst.cc @@ -57,6 +57,8 @@ PowerStaticInst::printReg(std::ostream &os, int reg) const } case CCRegClass: panic("printReg: POWER does not implement CCRegClass\n"); + case VectorRegClass: + panic("printReg: POWER does not implement VectorRegClass\n"); } } -- cgit v1.2.3